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Question

Yesterday I asked a question here asking for help on inverting an input voltage (0-VCC V) around a fixed voltage. For my case, I had a 5V DC source and the fixed voltage is supposed to be 2.5V, therefore the circuit is supposed to take an input voltage, e.g. X, and output 5-X V.

I’ve received a lot of answers, but the one that I found the simplest was a Current Mirror circuit. I am familiar with these types of circuits on their own, but I don’t understand how it can output the 5-X V I need.

From @td127 that answered: “It's a current mirror where the input current flows through R4 and Q1 and is duplicated in R5 and Q2 which provides an output inverted with respect to input.”

I am quite familiar with basic electronics knowledge, but I just can’t figure it out. How would I go about understanding it?

Answer 1

If you have two perfectly matched transistors, having the same \$V_{BE}\$, they will pass the same collector current, below left:

^{simulate this circuit – Schematic created using CircuitLab}

On the right, I ask the left transistor to bias itself, by connecting base directly to collector, in a so-called "diode connected transistor" arrangement, and instead of having that transistor decide its collector current, I tell it explicitly what that current should be. It still mirrors quite well, collector current in Q4 is nearly the same, but sadly that path collector-to-base connection is diverting a small fraction of Q3's collector current, upsetting the balance somewhat.

Therefore, while you may be tempted to use this arrangement, you should be aware that it is far from ideal, it requires you to find two very similar transistors, and temperature difference between them will further upset that already-imperfect balance. On top of that, you have the Early effect to consider, which will slightly alter transistor current gain as Q4 collector potential changes. Q3's collector is fixed at around +0.6V or +0.7V (depending on current), but Q4's collector can rise and fall between +5V and +0.1V or so, another imbalance that ruins precision.

You can mitigate the Early effect with another transistor to permit Q3 to maintain its collector near zero also, and by changing which one self-biases, in a "wilson current mirror" design:

^{simulate this circuit}

This improves accuracy, but Q5 is another matching transistor to find, and keep at the same temperature as the others, and now you can't get less than +0.7V at the "output", Q5's collector.

Going back to the regular mirror, we can do some algebra to derive equations to describe approximate behaviour:

^{simulate this circuit}

Diode-connected Q1 maintains a (roughly) fixed \$V_X\approx +0.6{\rm V}\$, so we can use this fact, together with Ohm's law to determine current \$I\$:

$$ \begin{aligned} I &= \frac{V_{IN}-V_X}{R_1} \\ \\ &= \frac{2{\rm V} - 0.6{\rm V}}{10{\rm k\Omega}} \\ \\ &\approx 140{\rm \mu A} \end{aligned} $$

This current is mirrored on the other side, but this time it has to pass via R2, which will develop a voltage \$V_{R2}\$ across it. The top end of R2 is fixed at +5V, so node Y (bottom end of R2) potential \$V_Y\$ must fall from +5V as \$I\$ increases from zero:

$$ \begin{aligned} V_{R2} &= IR_2 \\ \\ V_Y &= (+5{\rm V}) - V_{R2} \\ \\ &= (+5{\rm V}) - IR_2 \\ \\ &= (+5{\rm V}) - (140{\rm \mu A} \times 20{\rm k\Omega}) \\ \\ &= +2.2{\rm V} \end{aligned} $$

That's where the "five minus something" comes from. We already have an expression for current \$I\$, so let's plug that in, to obtain an approximate relationship between input \$V_{IN}\$ and output \$V_Y\$:

$$ \begin{aligned} V_Y &\approx (+5{\rm V}) - \left( V_{IN}-0.6{\rm V} \right) \frac{R_2}{R_1} \\ \\ \end{aligned} $$

In your original schematic, R1, R2 and R3 are used to remove that pesky +0.6V offset from this equation. They are kept deliberately small compared to R4, so that current drawn via R4 ("master control current") does not significantly load (and alter) what I have called \$V_{IN}\$ in my schematic.

It is approximate as I mentioned, very slightly non-linear, and will depend on temperature and transistor gain and matching. If you require better precision, then this is certainly not the way to go. For best precision you require negative feedback, probably using an op-amp, though you could still obtain good results using discrete transistors.

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The ratio \$-\frac{R_2}{R_1}\$ in my equation above is effectively gain. In your own circuit this gain is:

$$ -\frac{R_5}{R_4} = \frac{139k}{100k}=-1.39$$

It is necessary to "undo" the attenuation due to the input conditioning:

^{simulate this circuit}

I used Thevenin's theorem to produce the equivalent on the right. Gain of this prior stage is:

$$ \frac{\Delta V_{ATTEN}}{\Delta V_{IN}} = \frac{2.6k}{1k + 2.6k} = \frac {1}{1.39} $$

The gain of the two stages together is

$$ \frac{1}{1.39} \times -1.39 = -1 $$

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To put this into the context of your other question, the following (which is effectively this answer from that other question) produces much better results:

^{simulate this circuit}

This design uses negative feedback in a closed loop around an extremely high gain op-amp, having several huge benefits:

1. Gain is exactly \$-\frac{R_2}{R_1}=-1\$, not approximate. The relationship is exactly \$V_{OUT}=5-V_{IN}\$, or rather, it's as exact as your 5V supply and the various resistors.

2. Output impedance is near zero, and output will stay rock solid under (reasonable) load. Your current mirror circuit has output impedance of 139kΩ, causing potential to change under even the slightest load. This output would probably need a buffer anyway, ironically an op-amp configured as a voltage follower.

3. Input impedance is 100kΩ, a far less demanding load than the 3.6kΩ presented by the input resistors of the current mirror solution.

4. The offset of 0.6V is not an issue here.

5. Temperature dependence is gone.

6. Transistor matching is not necessary.

Answer 2

How would I go about understanding it?

For matched transistors, their collector currents will be identical if the base-emitter voltages are the same, since BJT's are fundamentally voltage-controlled devices (even though we often think of them as current-controlled).
In a current mirror, Q1 generates a base-emitter voltage as determined by its collector current.
Since this base-emitter voltage is also seen by Q2, then Q2's collector current is the same as Q1's, (but modified some by the finite collector-emitter resistance at its collector current and voltage).

Below is an LTspice sim showing the variation in Q2's current (green trace) with collector voltage from 0V to 5V (yellow trace) for a 1mA input current.
Note that the variation is small once Q2's collector voltage is above about 200mV.

For best matching, use a matched transistor pair in one package, such as the DMMT3904W.

Make sense?